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CLAHE Implementation and Evaluation on a Low-End FPGA Board by High-Level Synthesis.
Koki Honda
Kaijie Wei
Masatoshi Arai
Hideharu Amano
Published in:
IEICE Trans. Inf. Syst. (2021)
Keyphrases
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high level synthesis
low end
parallel architecture
hardware implementation
high end
design space exploration
low cost
high speed
parallel processing
real time