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Automated hierarchical CMOS analog circuit stack generation with intramodule connectivity and matching considerations.
Ravindranath Naiknaware
Terri S. Fiez
Published in:
IEEE J. Solid State Circuits (1999)
Keyphrases
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analog circuits
fault diagnosis
matching algorithm
pattern matching
neural network
low cost
wavelet packet transform
image matching
digital circuits
expert systems
feature points
power consumption
coarse to fine
high speed
constraint satisfaction
graph matching