Cell height driven transistor sizing in a cell based static CMOS module design.

How-Rern Lin Yu-Chin Hsu TingTing Hwang

Published in: IEEE J. Solid State Circuits (1996)

Keyphrases

high speed
manufacturing cell
circuit design
low cost
design process
single chip
expert systems
data driven
low power
data sets
power dissipation
engineering design
verilog hdl
immune response
vlsi circuits
design decisions
image analysis
neural network