New 2 Gbit/s CMOS I/O pads.

Guido Masera Gianluca Piccinini Massimo Ruo Roch Maurizio Zamboni

Published in: Great Lakes Symposium on VLSI (1999)

Keyphrases

input output
high speed
low cost
power consumption
low power
power supply
analog vlsi
vlsi circuits
file system
data sets
secondary storage
main memory
delay insensitive
image sensor
gate dielectrics
random access memory
garbage collection
focal plane
circuit design
pose estimation
object oriented