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Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems.
Shobha Vasudevan
Vinod Viswanath
Robert W. Sumners
Jacob A. Abraham
Published in:
IEEE Trans. Computers (2007)
Keyphrases
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term rewriting systems
functional programs
logic programs
high speed
model based diagnosis
forward selection
refinement process
delay insensitive
analog vlsi
logic circuits
floating point
digital circuits
circuit design
power dissipation
logic synthesis