Vinod Viswanath

Publication Activity (10 Years)

Years Active: 1999-2024
Publications (10 Years): 4

Top Topics

Fourier Transform

Face Verification

Mobile Services

Top Venues

Publications

Vinod Viswanath, Kanad Chakraborty
DFT Static Verification using Early RTL Exploration and Debug for Mobile SoC and Edge AI Applications. VLSID (2024)
Pranav Ashar, Vinod Viswanath
Closing the Verification Gap with Static Sign-off. ISQED (2019)
Pranav Ashar, Vikas Sachdeva, Vinod Viswanath
Failures and verification solutions related to untimed paths in SOCs. ISQED (2017)
Brian Cline, Saibal Mukhopadhyay, Peter J. Wright, Hai Li, Vinod Viswanath, Paul Wesling, Gang Qu, Ali Iranmanesh
Welcome. ISQED (2016)
Vinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Jacob A. Abraham
On a rewriting strategy for dynamically managing power constraints and power dissipation in SoCs. ISQED (2013)
Vinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Ananth S. Narayan
Power Management Methods: From Specification and Modeling, to Techniques and Verification. J. Low Power Electron. 8 (4) (2012)
Vinod Viswanath, Jacob A. Abraham
Automatic and Correct Register Transfer Level Annotations for Low Power Microprocessor Design. J. Low Power Electron. 8 (4) (2012)
Vinod Viswanath, Shobha Vasudevan, Jacob A. Abraham
Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTL. VLSI Design (2009)
Vinod Viswanath, Shobha Vasudevan, Jacob A. Abraham
Dedicated Rewriting: Automatic Verification of Low Power Transformations in Register Transfer Level. J. Low Power Electron. 5 (3) (2009)
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham, Jiajin Tu
Sequential equivalence checking between system level and RTL descriptions. Des. Autom. Embed. Syst. 12 (4) (2008)
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham
Efficient Microprocessor Verification using Antecedent Conditioned Slicing. VLSI Design (2007)
Shobha Vasudevan, Vinod Viswanath, Robert W. Sumners, Jacob A. Abraham
Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems. IEEE Trans. Computers 56 (10) (2007)
Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt Jr.
Automatic insertion of low power annotations in RTL for pipelined microprocessors. DATE (2006)
Shobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu
Automatic decomposition for sequential equivalence checking of system level and RTL descriptions. MEMOCODE (2006)
Vinod Viswanath
Multi-log Processor - Towards Scalable Event-Driven Multiprocessors. DSD (2004)
Dana S. Henry, Bradley C. Kuszmaul, Vinod Viswanath
The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture. ARVLSI (1999)