A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS.
Sudhir SatpathySanu K. MathewVikram B. SureshMark A. AndersHimanshu KaulAmit AgarwalSteven HsuGregory K. ChenRam K. KrishnamurthyVivek K. DePublished in: IEEE J. Solid State Circuits (2017)
Keyphrases
- power dissipation
- cmos technology
- nm technology
- power consumption
- high speed
- circuit design
- clock gating
- low power
- analog vlsi
- silicon on insulator
- low voltage
- delay insensitive
- random access memory
- parallel processing
- power reduction
- flip flops
- logic circuits
- digital signal processing
- chip design
- metal oxide semiconductor
- digital circuits
- infrared
- genetic algorithm