Efficient transistor-level design of CMOS gates.
Vinicius N. PossaniVinicius CallegaroAndré Inácio ReisRenato P. RibasFelipe de Souza MarquesLeomar Soares da Rosa Jr.Published in: ACM Great Lakes Symposium on VLSI (2013)
Keyphrases
- circuit design
- high speed
- single chip
- low cost
- engineering design
- peer to peer overlay
- design tools
- design methodology
- real time
- building blocks
- case study
- efficient implementation
- design principles
- computer aided
- design process
- levels of abstraction
- knowledge level
- design space
- object oriented
- power dissipation
- logic circuits
- metal oxide semiconductor
- image processing