A delay test system for high speed logic LSI's.

Kuniaki Kishida F. Shirotori Y. Ikemoto Shun Ishiyama Terumine Hayashi

Published in: DAC (1986)

Keyphrases

high speed
logic programming
neural network
multi valued
knowledge base
latent semantic indexing
automated reasoning
database
real time
knowledge representation
test data
low power
statistical tests
digital circuits
asynchronous circuits
critical path