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Leakage Power Analysis of Multi-bit Adders Using Transistor Gate Length Increase.
Savithra Eratne
Claudia Romo
Eugene John
Published in:
CDES (2010)
Keyphrases
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power analysis
leakage current
block cipher
differential power analysis
countermeasures
bit parallel
smart card
low voltage
silicon dioxide
high speed
integrated circuit
shift register
low power
s box
security mechanisms