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Towards Analysing the Effect of Snoozy Caches on the Temperature of Tiled Chip Multi-Processors.
Ashwini A. Kulkarni
Chirag Joshi
Khushboo Rani
Sukarn Agarwal
Shrinivas P. Mahajan
Hemangee K. Kapoor
Published in:
ISED (2018)
Keyphrases
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high speed
memory access
low cost
parallel algorithm
parallel processing
multithreading
high density
single chip
memory subsystem
signal processor
neural network
computational power
high performance computing
high temperature