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A performance-driven QBF-based iterative logic array representation with applications to verification, debug and test.
Hratch Mangassarian
Andreas G. Veneris
Sean Safarpour
Marco Benedetti
Duncan Exon Smith
Published in:
ICCAD (2007)
Keyphrases
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data driven
asynchronous circuits
multi valued
logic programming
model checking
test generation
bounded model checking
logical representation
learning algorithm
signature verification
relation algebra