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SRAM in 10nm FinFET technology with pulsed PMOS TVC and stepped-WL for low-voltage applications.
Zheng Guo
Daeyeon Kim
Satyanand Nalam
Jami Wiedemer
Xiaofei Wang
Eric Karl
Published in:
ISSCC (2018)
Keyphrases
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cmos technology
low voltage
low power
leakage current
power consumption
random access memory
parallel processing
power line
embedded dram
silicon on insulator
power dissipation
low cost
design considerations
high speed
power management
image sensor
cost effective