Evaluation of fault tolerant technique based on homogeneous FPGA architecture.
Yuki NishitaniKazuki InoueMotoki AmagasakiMasahiro IidaMorihiro KugaToshinori SueyoshiPublished in: VLSI-SoC (2012)
Keyphrases
- fault tolerant
- fault tolerance
- distributed systems
- load balancing
- high availability
- hardware architecture
- real time
- hardware design
- hardware implementation
- software implementation
- fpga technology
- state machine
- parallel architecture
- interconnection networks
- management system
- dedicated hardware
- hardware architectures
- mobile agents
- high speed
- low cost
- fpga implementation
- reconfigurable hardware
- systolic array
- artificial intelligence