Generation of Test Sequences with Low Power Dissipation for Sequential Circuits.
Yoshinobu HigamiShin-ya KobayashiYuzo TakamatsuPublished in: IEICE Trans. Inf. Syst. (2004)
Keyphrases
- low power
- test sequences
- high speed
- logic circuits
- energy dissipation
- vlsi circuits
- cmos technology
- low cost
- power consumption
- delay insensitive
- power dissipation
- power reduction
- mixed signal
- single chip
- video sequences
- test cases
- test generation
- bit rate
- wireless transmission
- high power
- low power consumption
- image sensor
- digital signal processing
- vlsi architecture
- computer vision
- power saving
- digital circuits
- real time
- gate array