A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and '1'/'0' Dual-Array Equalized Reference Scheme.
Riichiro TakemuraTakayuki KawaharaKatsuya MiuraHiroyuki YamamotoJun HayakawaNozomu MatsuzakiKazuo OnoMichihiko YamanouchiKenchi ItoHiromasa TakahashiShoji IkedaHaruhiro HasegawaHideyuki MatsuokaHideo OhnoPublished in: IEEE J. Solid State Circuits (2010)