An experimental 256-Mb DRAM with boosted sense-ground scheme.
Mikio AsakuraTsukasa OoishiMasaki TsukudeShigeki TomishimaTakahisa EimoriHideto HidakaYoshikazu OhnoKazutani ArimotoKazuyasu FujishimaTadashi NishimuraTsutomu YoshiharaPublished in: IEEE J. Solid State Circuits (1994)