Login / Signup

Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-End Metal Line of CMOS Circuits.

Fumitaka IgaMasashi KamiyanagiShoji IkedaKatsuya MiuraJun HayakawaHaruhiro HasegawaTakahiro HanyuHideo OhnoTetsuo Endoh
Published in: IEICE Trans. Electron. (2010)
Keyphrases
  • back end
  • high speed
  • data mining
  • data types
  • user friendly
  • random access memory
  • low power
  • cmos technology
  • data management
  • power consumption
  • circuit design
  • delay insensitive
  • analog vlsi