DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks.
Sergej DeutschBrion L. KellerVivek ChickermaneSubhasish MukherjeeNavdeep SoodSandeep Kumar GoelJi-Jan ChenAshok MehtaFrank LeeErik Jan MarinissenPublished in: ITC (2012)
Keyphrases
- storage devices
- main memory
- memory access
- management system
- input output
- high speed
- secondary storage
- memory management
- real time
- logic programming
- software architecture
- memory hierarchy
- data transfer
- garbage collection
- frequency domain
- internal memory
- memory space
- reasoning engine
- random access memory
- classical logic
- ibm zenterprise
- processing elements
- external memory
- memory subsystem
- file system
- gigabit ethernet
- ibm eservertm
- database workloads
- parallel computers
- cache conscious
- multithreading
- associative memory
- query processing
- data structure