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Isolated Preset Architecture for a 32nm SOI embedded DRAM macro.
John Barth
Don Plass
Adis Vehabovic
Rajiv V. Joshi
Rouwaida Kanj
Steven Burns
Todd Weaver
Published in:
VLSIC (2012)
Keyphrases
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embedded dram
dynamic random access memory
cmos technology
silicon on insulator
random access memory
metal oxide semiconductor
low power
design considerations
real time
power consumption
data flow
low voltage