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On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD.

Sobeeh AlmukhaizimYiorgos MakrisYu-Shen YangAndreas G. Veneris
Published in: IOLTS (2008)
Keyphrases
  • logic circuits
  • low power
  • functional decomposition
  • steady state
  • real time
  • neural network
  • low cost
  • signal processing
  • parallel algorithm
  • tunnel diode