Parallelizing SRAM arrays with customized bit-cell for binary neural networks.
Rui LiuXiaochen PengXiaoyu SunWin-San KhwaXin SiJia-Jing ChenJia-Fang LiMeng-Fan ChangShimeng YuPublished in: DAC (2018)
Keyphrases
- neural network
- random access memory
- gray code
- logical operations
- bit string
- pattern recognition
- fuzzy logic
- binary representation
- fuzzy systems
- non binary
- artificial neural networks
- genetic algorithm
- self organizing maps
- neural network model
- design considerations
- power consumption
- recurrent neural networks
- back propagation
- low voltage
- parallel processing
- microscopy images
- run length
- multi layer perceptron
- data transmission
- feed forward
- neural nets
- immune response