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Silicon Effect-Aware Full-Chip Extraction and Mitigation of TSV-to-TSV Coupling.
Yarui Peng
Taigon Song
Dusan Petranovic
Sung Kyu Lim
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
Keyphrases
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high density
low cost
high speed
information extraction
cmos technology
automatic extraction
real time
decision support system
low power
risk management
automatically extracted
single chip
vlsi implementation
vlsi design
analog vlsi