A 10-Gb/s data-pattern independent clock and data recovery circuit with a two-mode phase comparator.
Hideyuki NosakaKiyoshi IshiiTakatomo EnokiTsugumichi ShibataPublished in: IEEE J. Solid State Circuits (2003)
Keyphrases
- data sets
- data processing
- raw data
- small number
- data points
- training data
- data analysis
- knowledge discovery
- image data
- computer systems
- data collection
- historical data
- data distribution
- application domains
- sensor data
- database
- high quality
- training set
- synthetic data
- high speed
- data acquisition
- missing values
- information systems
- original data
- noisy data
- complex data
- data structure