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A Low-Voltage 6T Dual-Port Configured SRAM with Wordline Boost in 28 nm FD-SOI.
Masoud Nouripayam
Joachim Rodrigues
Xiao Luo
Tom Johansson
Babak Mohammadi
Published in:
ESSCIRC (2021)
Keyphrases
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low voltage
cmos technology
leakage current
silicon on insulator
low power
random access memory
power consumption
power line
design considerations
parallel processing
dynamic random access memory
power management
high speed
power dissipation
silicon dioxide
electrical properties
embedded dram