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Bit-line leakage current tracking and self-compensation circuit for SRAM reliability design.

Chenghu DaiYuanyuan DuQi ShiRuixuan WangHao ZhengWenjuan LuChunyu PengLicai HaoZhiting LinXiulong Wu
Published in: Microelectron. J. (2023)
Keyphrases
  • circuit design
  • real time
  • power consumption
  • digital circuits
  • random access memory
  • leakage current
  • design process
  • design considerations
  • cmos technology
  • low voltage
  • electronic circuits