RSCE-aware ultra-low-voltage 40-nm CMOS circuits.

Jinn-Shyan Wang Keng-Jui Chang Shu-Yi Yang Tsung-Han Hsieh Chingwei Yeh

Published in: ISOCC (2011)

Keyphrases

low voltage
cmos technology
low power
high speed
power consumption
power dissipation
parallel processing
power line
random access memory
leakage current
silicon on insulator
image sensor
low cost
mixed signal
design considerations
vlsi circuits
digital camera
machine vision
power reduction