Transistor-level Sizing and Timing Verification of Domino Circuits in the Power PC Microprocessor.
Abhijit DharchoudhuryDavid T. BlaauwJoe NortonSatyamurthy PullelaJ. DunningPublished in: ICCD (1997)
Keyphrases
- high speed
- asynchronous circuits
- power dissipation
- circuit design
- functional verification
- power consumption
- chip design
- higher level
- low power
- delay insensitive
- power losses
- real time
- levels of abstraction
- signature verification
- design methodology
- personal computer
- floating gate
- special purpose hardware
- neural network