A research of heuristic optimization approaches to the test set compaction procedure based on a decomposition tree for combinational circuits.
Valentina AndreevaKirill A. SorudeykinPublished in: EWDTS (2013)
Keyphrases
- test set
- optimization approaches
- error rate
- tree search
- mathematical programming
- optimization methods
- search procedure
- test data
- training data
- training set
- evaluation methodology
- logic circuits
- simulated annealing
- class distribution
- logic synthesis
- test cases
- search algorithm
- data sets
- stage stochastic programs
- combinatorial optimization
- tabu search
- dynamic programming
- optimal solution
- machine learning