Login / Signup

Modeling substrate noise generation in CMOS digital integrated circuits.

Makoto NagataTakashi MorieAtsushi Iwata
Published in: CICC (2002)
Keyphrases
  • integrated circuit
  • metal oxide semiconductor
  • circuit design
  • high speed
  • noise model
  • signal to noise ratio
  • low cost
  • noisy data
  • random noise
  • electron beam