Accurate Logic-Level Current Estimation for Digital CMOS Circuits.
Paulino Ruiz-de-ClavijoJorge Juan-ChicoManuel Jesús Bellido DíazAlejandro MillánDavid Guerrero MartosEnrique OstúaJulian ViejoPublished in: J. Low Power Electron. (2006)
Keyphrases
- delay insensitive
- circuit design
- digital circuits
- low voltage
- logic circuits
- high speed
- analog vlsi
- low power
- mixed signal
- logic synthesis
- chip design
- vlsi circuits
- asynchronous circuits
- accurate estimation
- floating gate
- random access memory
- real time
- high accuracy
- classical logic
- metadata
- estimation accuracy
- error analysis
- computationally efficient
- logic programming
- low cost
- focal plane
- cmos technology
- design considerations
- multi valued
- estimation error
- modal logic
- power consumption
- higher level
- cmos image sensor