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1.0 ps Resolution Time-to-Digital Converter Based-On Cascaded Time-Difference-Amplifier Utilizing Differential Logic Delay Cells.
Shingo Mandai
Tetsuya Iizuka
Toru Nakura
Makoto Ikeda
Kunihiro Asada
Published in:
IEICE Trans. Electron. (2011)
Keyphrases
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data conversion
phase locked loop
high voltage
modal logic
high resolution
logic programming
low resolution
control method
multi valued
classical logic
digital circuits
high power
analog to digital converter
input output
proof theory
description logics
low cost
relational databases