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Synthesis of Multi-Level Combinational Circuits for Complete Robust Path Delay Fault Testability.
Niraj K. Jha
Irith Pomeranz
Sudhakar M. Reddy
Robert J. Miller
Published in:
FTCS (1992)
Keyphrases
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fault diagnosis
analog circuits
logic circuits
shortest path
fault detection
logic synthesis
computationally efficient
texture synthesis
digital circuits