8.9b ENOB 40MS/s pipelined SAR ADC in 65nm CMOS.
Masanori FurutaMai NozawaTetsuro ItakuraPublished in: ISSCC (2010)
Keyphrases
- analog to digital converter
- cmos technology
- silicon on insulator
- metal oxide semiconductor
- synthetic aperture radar
- nm technology
- low power
- sar images
- power consumption
- low cost
- single chip
- high speed
- analog vlsi
- cmos image sensor
- low voltage
- sar imagery
- automatic target recognition
- pac man
- delay insensitive
- image reconstruction
- parameter estimation
- vlsi circuits
- ibm power processor
- sea ice
- mixed signal
- power supply
- image sensor
- data flow
- integrated circuit
- wide dynamic range
- maximum likelihood
- wavelet transform
- transmission electron microscopy
- signal subspace
- multiple sclerosis
- power dissipation
- parallel processing
- bit rate