Logic-Level Fast Current Simulation for Digital CMOS Circuits.
Paulino Ruiz-de-ClavijoJorge Juan-ChicoManuel Jesús Bellido DíazAlejandro Millán CalderónDavid Guerrero MartosEnrique OstúaJulian ViejoPublished in: PATMOS (2005)
Keyphrases
- delay insensitive
- chip design
- circuit design
- high speed
- floating gate
- random access memory
- mixed signal
- digital circuits
- analog vlsi
- asynchronous circuits
- vlsi circuits
- logic synthesis
- low voltage
- logic circuits
- simulation model
- low power
- power dissipation
- low cost
- truth table
- neural network
- analog circuits
- power supply
- simulation models
- multi valued
- simulation environment
- logic programming
- higher level
- digital libraries