Cool Mega-Arrays: Ultralow-Power Reconfigurable Accelerator Chips.
Nobuaki OzakiYoshihiro YasudaMai IzawaYoshiki SaitoDaisuke IkebuchiHideharu AmanoHiroshi NakamuraKimiyoshi UsamiMitaro NamikiMasaaki KondoPublished in: IEEE Micro (2011)
Keyphrases
- field programmable gate array
- power consumption
- functional units
- high speed
- general purpose
- neural network
- digital signal processors
- low cost
- image processing
- reconfigurable architecture
- chip design
- power reduction
- integrated circuit
- computer systems
- computational power
- bio inspired
- parallel implementation
- compute intensive
- data structure