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Simulation of Gate-All-Around Tunnel Field-Effect Transistor with an n-Doped Layer.
Dong-Seup Lee
Hong-Seon Yang
Kwon-Chil Kang
Joung-Eob Lee
Jung Han Lee
Seongjae Cho
Byung-Gook Park
Published in:
IEICE Trans. Electron. (2010)
Keyphrases
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field effect transistors
mathematical analysis
simulation model
steady state
high density
schottky barrier
chip design
neural network
real time
simulation study
cost effective
multi layer
high speed
simulation environment
data warehouse
machine learning
real world