Designing a Testable System on a Chip.

Stephen V. Kosonocky Arthur A. Bright Kevin W. Warren Ruud A. Haring Steve Klepner Sameh W. Asaad S. Basavaiah Bob Havreluk David F. Heidel Michael Immediato Keith A. Jenkins Rajiv V. Joshi Benjamin D. Parker T. V. Rajeevakumar Kevin Stawiasz

Published in: VTS (1998)

Keyphrases

high speed
low cost
high density
functional verification
vlsi implementation
data structure
neural network
decision making
information retrieval
image processing
knowledge base
search algorithm
artificial neural networks
artificial intelligence
genetic algorithm
host computer
data mining