Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience).
Eric ChengShahrzad MirkhaniLukasz G. SzafarynChen-Yong CherHyungmin ChoKevin SkadronMircea R. StanKlas LiljaJacob A. AbrahamPradip BoseSubhasish MitraPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
Keyphrases
- cross layer
- wireless networks
- video streaming
- multi layer
- quality of service
- mobile ad hoc networks
- multi core processors
- application layer
- routing protocol
- processor core
- error detection
- wireless ad hoc networks
- multimedia services
- high speed
- ad hoc networks
- qos requirements
- scalable video
- end to end
- fault tolerance
- rate distortion
- metadata