Gate leakage reduction for scaled devices using transistor stacking.
Saibal MukhopadhyayCassondra NeauR. T. CakiciAmit AgarwalChris H. KimKaushik RoyPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2003)
Keyphrases
- leakage current
- low voltage
- silicon dioxide
- electrical properties
- high speed
- mobile devices
- low power
- carbon nanotubes
- processing capabilities
- combining multiple
- embedded devices
- integrated circuit
- power line
- metal oxide semiconductor
- machine learning
- physical world
- cmos technology
- field effect transistors
- smart phones
- nano scale
- embedded systems