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A Universal VLSI Architecture for Reed-Solomon Error-and-Erasure Decoders.
Hsie-Chia Chang
Chien-Ching Lin
Fu-Ke Chang
Chen-Yi Lee
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2009)
Keyphrases
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vlsi architecture
channel coding
unequal error protection
vlsi implementation
error correction
low complexity
low power
error propagation
real time
turbo codes
error detection
source coding
error resilience
multiple description coding
high speed
power consumption
rate distortion
low cost
multiscale