A Novel Low Power Error Detection Logic for Inexact Leading Zero Anticipator in Floating Point Units.
B. Naveen Kumar ReddyM. Chandra SekharSreehari VeeramachaneniM. B. SrinivasPublished in: VLSI Design (2014)
Keyphrases
- low power
- floating point
- error detection
- logic circuits
- error correction
- power consumption
- low cost
- high speed
- delay insensitive
- fixed point
- error correcting
- fault tolerance
- instruction set
- error resilient
- low power consumption
- gate array
- floating point arithmetic
- asynchronous circuits
- digital circuits
- sufficient conditions
- power dissipation
- mixed signal
- floating point unit
- image processing