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26.1 A 5.5mW ADPLL-based receiver with hybrid-loop interference rejection for BLE application in 65nm CMOS.

Hidenori OkuniAkihide SaiTuan Thanh TaSatoshi KondoTakashi TokairinMasanori FurutaTetsuro Itakura
Published in: ISSCC (2016)
Keyphrases
  • power consumption
  • fault diagnosis
  • user friendly
  • end to end