SCINDY: Logic Crosstalk Delay Fault Simulation in Sequential Circuits.
Marong PhadoongsidhiKewal K. SalujaPublished in: VLSI Design (2005)
Keyphrases
- delay insensitive
- fault models
- asynchronous circuits
- chip design
- digital circuits
- logic synthesis
- simulation model
- fault detection
- logic programming
- logic circuits
- power dissipation
- simulation models
- random access memory
- circuit design
- multi valued
- simulation study
- power consumption
- mathematical model
- real time
- floating gate
- high level synthesis