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A multi-bit/cell PUF using analog breakdown positions in CMOS.
Kai-Hsin Chuang
Erik Bury
Robin Degraeve
Ben Kaczer
T. Kallstenius
Guido Groeseneken
Dimitri Linten
Ingrid Verbauwhede
Published in:
IRPS (2018)
Keyphrases
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analog vlsi
analog to digital converter
circuit design
successive approximation
high speed
cmos image sensor
focal plane
mixed signal
low power
random access memory
data sets
floating gate
vlsi circuits
power consumption
low voltage
signal processing
digital images
real time