Login / Signup
Improving path delay testability of sequential circuits.
Tapan J. Chakraborty
Vishwani D. Agrawal
Michael L. Bushnell
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2000)
Keyphrases
</>
high speed
path length
analog circuits
simulated annealing
shortest path
digital circuits
test data generation
data sets
genetic algorithm
search algorithm
end to end
optimal path
power dissipation
sequential search