Integration of a Real-Time CCSDS 410.0-B-32 Error-Correction Decoder on FPGA-Based RISC-V SoCs Using RISC-V Vector Extension.
Yao-Ming KuoMark F. FlanaganFrancisco Garcia-HerreroOscar RuanoJuan Antonio MaestroPublished in: IEEE Trans. Aerosp. Electron. Syst. (2023)
Keyphrases
- error correction
- application specific
- real time
- low power consumption
- reed solomon
- error control
- error detection
- ldpc codes
- hardware architecture
- turbo codes
- general purpose
- noisy channel
- low cost
- instruction set
- error correcting
- field programmable gate array
- low density parity check
- low power
- data hiding
- channel coding
- low complexity
- error detection and correction
- power consumption
- error resilient
- high speed
- watermarking scheme
- data acquisition
- computer simulation
- bit errors
- hardware implementation