ReDRAM: A Reconfigurable DRAM Cache for GPGPUs.
Debiprasanna SahooSwaraj ShaManoranjan SatpathyMadhu MutyamPublished in: IEEE Comput. Archit. Lett. (2018)
Keyphrases
- main memory
- memory subsystem
- dynamic random access memory
- database management systems
- data structure
- cache misses
- reconfigurable architecture
- low cost
- general purpose
- index structure
- prefetching
- memory hierarchy
- query processing
- high density
- systolic array
- fine grain
- back end
- hardware implementation
- digital signal
- embedded processors
- multi objective evolutionary
- cache management
- ibm zenterprise
- client server
- database systems
- management system
- low voltage
- dynamic reconfiguration
- data flow