A FPGA-Based Dual-Pixel Processing Pipelined Hardware Accelerator for Feature Point Detection Part in SIFT.
Jingbang QiuTianci HuangTakeshi IkenagaPublished in: NCM (2009)
Keyphrases
- feature points
- field programmable gate array
- scale invariant feature transform
- feature descriptors
- real time
- hardware implementation
- parallel architecture
- image sensor
- feature matching
- point correspondences
- affine transformation
- hardware architecture
- hardware design
- low cost
- embedded systems
- keypoints
- detection algorithm
- image sequences
- epipolar geometry
- object recognition
- data sets
- parallel implementation
- image matching
- detection method
- feature detectors
- computing systems
- processing elements
- fundamental matrix
- active appearance models
- massively parallel
- input image
- image features
- image processing
- compute intensive
- harris corner detector