tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling.
Tianchen GuJiaqi WangZhaori BiChanghao YanFan YangYajie QinTao CuiXuan ZengPublished in: DATE (2024)
Keyphrases
- analog circuits
- power losses
- maximum likelihood
- digital circuits
- neural network
- dimensionality reduction
- low dimensional
- high dimensional data
- high dimensional
- fault diagnosis
- dynamic systems
- wavelet packet transform
- bayesian networks
- bayesian inference
- subspace clustering
- feature extraction
- decision making
- artificial intelligence